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NE5561 NE5568的外部同步
消耗积分:3 |
格式:rar |
大小:32 |
2009-05-30
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Synchronization of the 5561 can be accomplished by forcing the
timing pin (Pin 5) above the 5.6V sawtooth limit comparator for a
short time.
A drawback to this approach is that when the 5.6V threshold is
reached, a discharge transistor is turned on to quickly pull the timing
capacitor to ground and will also attempt to pull the pulse generator
to ground. This condition can be avoided by keeping the pulse width
very narrow (0.1ms) or by placing a differentiator network between
the pulse generator and the diode.
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