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AD723,pdf datasheet (Load Dete
消耗积分:2 |
格式:rar |
大小:501 |
2009-09-14
刘杰
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The AD723 is a predominantly analog design, with digital logic
control of timing. This timing logic is driven by an external
frequency reference at four times the color subcarrier frequency,
input into the 4FSC pin of the AD723. This frequency should
be 14.318 180 MHz for NTSC encoding, and 17.734 475 MHz
for PAL encoding. The 4FSC input accepts standard 3 V CMOS
logic levels. The duty cycle of this input clock is not critical, but
a fast-edged clock should be used to prevent excessive jitter in
the timing.
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