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A1321/A1322/A1323 pdf datashee
消耗积分:5 |
格式:rar |
大小:555 |
2008-07-24
张丽
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The A132X family of linear Hall-effect sensors are optimized,
sensitive, and temperature-stable. These ratiometric Hall-effect
sensors provide a voltage output that is proportional to the
applied magnetic field. The A132X family has a quiescent
output voltage that is 50% of the supply voltage and output
sensitivity options of 2.5mV/G, 3.125mV/G, and 5mV/G. The
features of this family of devices are ideal for use in the harsh
environments found in automotive and industrial linear and
rotary position sensing systems.
Each device has a BiCMOS monolithic circuit which integrates
a Hall element, improved temperature-compensating circuitry
to reduce the intrinsic sensitivity drift of the Hall element,
a small-signal high-gain amplifier, and a rail-to-rail lowimpedance
output stage.
A proprietary dynamic offset cancellation technique, with
an internal high-frequency clock, reduces the residual offset
voltage normally caused by device overmolding, temperature
dependencies, and thermal stress. The high frequency clock
allows for a greater sampling rate, which results in higher
accuracy and faster signal processing capability. This technique
produces devices that have an extremely stable quiescent output
voltage, are immune to mechanical stress, and have precise
sensitive, and temperature-stable. These ratiometric Hall-effect
sensors provide a voltage output that is proportional to the
applied magnetic field. The A132X family has a quiescent
output voltage that is 50% of the supply voltage and output
sensitivity options of 2.5mV/G, 3.125mV/G, and 5mV/G. The
features of this family of devices are ideal for use in the harsh
environments found in automotive and industrial linear and
rotary position sensing systems.
Each device has a BiCMOS monolithic circuit which integrates
a Hall element, improved temperature-compensating circuitry
to reduce the intrinsic sensitivity drift of the Hall element,
a small-signal high-gain amplifier, and a rail-to-rail lowimpedance
output stage.
A proprietary dynamic offset cancellation technique, with
an internal high-frequency clock, reduces the residual offset
voltage normally caused by device overmolding, temperature
dependencies, and thermal stress. The high frequency clock
allows for a greater sampling rate, which results in higher
accuracy and faster signal processing capability. This technique
produces devices that have an extremely stable quiescent output
voltage, are immune to mechanical stress, and have precise
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