资料下载
14路输出时钟发生器集成2.8千兆赫压控振荡器ad9516-0数据表
分享资料个
The AD9516-01 provides a multi-output clock distribution function with subpicosecond jitter performance， along with an on-chip PLL and VCO. The on-chip VCO tunes from 2.55 GHz to 2.95 GHz. Optionally， an external VCO/VCXO of up to 2.4 GHz can be used. The AD9516-0 emphasizes low jitter and phase noise to maximize data converter performance， and it can benefit other applications with demanding phase noise and jitter requirements.
The AD9516-0 features six LVPECL outputs （in three pairs） and four LVDS outputs （in two pairs）。 Each LVDS output can be reconfigured as two CMOS outputs. The LVPECL outputs operate to 1.6 GHz， the LVDS outputs operate to 800 MHz， and the CMOS outputs operate to 250 MHz. Each pair of outputs has dividers that allow both the divide ratio and coarse delay （or phase） to be set. The range of division for the LVPECL outputs is 1 to 32. The LVDS/CMOS outputs allow a range of divisions up to a maximum of 1024. The AD9516-0 is available in a 64-lead LFCSP and can be operated from a single 3.3 V supply. An external VCO， which requires an extended voltage range， can be accommodated by connecting the charge pump supply （VCP） to 5 V. A separate LVPECL power supply can be from 2.5 V to 3.3 V （nominal）。 The AD9516-0 is specified for operation over the industrial range of −40°C to +85°C.
声明：本文内容及配图由入驻作者撰写或者入驻合作网站授权转载。文章观点仅代表作者本人，不代表电子发烧友网立场。文章及其配图仅供工程师学习之用，如有内容侵权或者其他违规问题，请联系本站处理。 举报投诉
- 相关下载
- 相关文章
