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54ACT16823,74ACT16823,pdf(18-B
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These 18-bit flip-flops feature 3-state outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, parity bus interfacing, and working registers.
The 'ACT16823 can be used as two 9-bit flip-flops or one 18-bit flip-flop. With the clock-enable (
) input low, the D-type flip-flops enter data on the low-to-high transitions of the clock. Taking high disables the clock buffer, thus latching the outputs. Taking the clear () input low causes the Q outputs to go low independently of the clock.
A buffered output-enable () input can be used to place the outputs in either a normal logic state (high or low logic levels) or a high-impedance state.
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