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SN54AHC594, SN74AHC594,pdf(8-B
消耗积分:2 |
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大小:729 |
2010-08-03
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The ’AHC594 devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks and direct overriding clear (SRCLR\, RCLR\) inputs are provided on the shift and storage registers. A serial (QH’) output is provided for cascading purposes.
The shift register (SRCLK) and storage register (RCLK) clocks are positive-edge triggered. If the clocks are tied together, the shift register always is one clock pulse ahead of the storage register.
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