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SN65LVEP11,pdf(2.5V/3.3V PECL/
消耗积分:3 |
格式:rar |
大小:449 |
2010-08-28
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The SN65LVEP11 is a differential 1:2 PECL/ECL fanout buffer. The device includes circuitry to maintain known logic levels when the inputs are in an open condition. Single-ended clock input operation is limited to VCC ≥ 3 V in PECL mode, or VEE ≤ 3 V in NECL mode. The device is housed in an industry-standard SOIC-8 package and is also available in TSSOP-8 package option.
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