资料下载
×
PEX 8505 pdf datasheet (5 Lane
消耗积分:3 |
格式:rar |
大小:555 |
2008-10-10
分享资料个
The ExpressLane™ PEX 8505 5-lane, 5-port switch product offers PCI Express switching capability conforming to the PCI Express Specification r1.1. This device with an equal number of lanes and ports can be used in a wide variety of applications including control planes in the communications and networking markets, embedded systems, notebook and docking stations, set-top boxes, digital video recorders and multi-function printers. The PEX 8505 architecture supports packet cut-thru with the industry's lowest latency of 138ns (x2 to x1). This, combined with large packet memory (1024 byte maximum payload size) and non-blocking internal switch architecture, provide full line-rate on all ports. This switch is hardware configurable and software programmable, allowing users to tailor their port configurations and quality-of-service system needs to suit their application requirements. The PEX 8505 is offered in the industry's smallest package of 15 x 15mm 196-ball PBGA. The device is available in leaded and lead-free packaging.
声明：本文内容及配图由入驻作者撰写或者入驻合作网站授权转载。文章观点仅代表作者本人，不代表电子发烧友网立场。文章及其配图仅供工程师学习之用，如有内容侵权或者其他违规问题，请联系本站处理。 举报投诉
评论(0)
发评论
- 相关下载
- 相关文章
