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SCAN921023/SCAN921224,pdf data
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2009-10-13
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The SCAN921023 transforms a 10-bit wide parallel
LVCMOS/LVTTL data bus into a single high speed Bus
LVDS serial data stream with embedded clock. The
SCAN921224 receives the Bus LVDS serial data stream and
transforms it back into a 10-bit wide parallel data bus and
recovers parallel clock. Both devices are compliant with
IEEE 1149.1 Standard Test Access Port and Boundary Scan
Architecture with the incorporation of the defined boundaryscan
test logic and test access port consisting of Test Data
Input (TDI), Test Data Out (TDO), Test Mode Select (TMS),
Test Clock (TCK), and the optional Test Reset (TRST). IEEE
1149.1 features provide the designer or test engineer access
to the backplane or cable interconnects and the ability to
verify differential signal integrity to enhance their system test
strategy. The pair of devices also features an at-speed BIST
mode which allows the interconnects between the Serializer
and Deserializer to be verified at-speed.
LVCMOS/LVTTL data bus into a single high speed Bus
LVDS serial data stream with embedded clock. The
SCAN921224 receives the Bus LVDS serial data stream and
transforms it back into a 10-bit wide parallel data bus and
recovers parallel clock. Both devices are compliant with
IEEE 1149.1 Standard Test Access Port and Boundary Scan
Architecture with the incorporation of the defined boundaryscan
test logic and test access port consisting of Test Data
Input (TDI), Test Data Out (TDO), Test Mode Select (TMS),
Test Clock (TCK), and the optional Test Reset (TRST). IEEE
1149.1 features provide the designer or test engineer access
to the backplane or cable interconnects and the ability to
verify differential signal integrity to enhance their system test
strategy. The pair of devices also features an at-speed BIST
mode which allows the interconnects between the Serializer
and Deserializer to be verified at-speed.
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