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四输入多行卡自适应具有帧同步的时钟转换器ad9558数据表
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The AD9558 is a low loop bandwidth clock multiplier that provides jitter cleanup and synchronization for many systems， including synchronous optical networks （OTN/SONET/SDH）。 The AD9558 generates an output clock synchronized to up to four external input references. The digital phase-locked loop （PLL） allows reduction of input time jitter or phase noise associated with the external references. The digitally controlled loop and holdover circuitry of the AD9558 continuously generates a low jitter output clock even when all reference inputs have failed. The AD9558 operates over an industrial temperature range of −40°C to +85°C. If a smaller package is required， refer to the AD9557 for the two-input/two-output version of the same device.
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