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SN54HC241, SN74HC241,pdf(QUADR
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2010-07-17
吴藩
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These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC241 devices are organized as two 4-bit buffers/drivers with separate output-enable (1OE\ and 2OE) inputs. When 1OE\ is low or 2OE is high, the device passes noninverted data from the A inputs to the Y outputs. When 1OE\ is high or 2OE is low, the outputs for the respective buffers/drivers are in the high-impedance state.
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