The AD8283CP-EBZ and AD8285CP-EBZ are designed to aid in the evaluation of AD8283 and AD8285 radar receive path ICs. The boards connects to the high speed ADC FIFO evaluation board for ready data capture. They also provides flexible options for clock settings, voltage references, and provides easy interfaces for input signals. The AD8283 or AD8285 datasheets should be consulted when using the evaluation board.

• SPI interface for setup and control
• On-board clock driver for optional external clock inputs
• On-board optional external voltage reference

• AD8283 or AD8285 data sheet
• HSC-ADC-EVALC, High Speed ADC FIFO Evaluation kit C
• AN-905 Application Note, VisualAnalog Converter Evaluation Tool Version 1.0 User Manual
• AN-878 Application Note, High Speed ADC SPI Control Software
• AN-877 Application Note, Interfacing to High Speed ADCs via SPI
• AD8283 and AD8285 Evaluation Board Page, Schematic, Layout and Configuration Files, see Software section

• (2) 6.0V, 2.0A switching power source, provided
• PC running Windows
• USB 2.0 port
• AD8283CP-EBZ or AD8285CP-EBZ board
• HSC-ADC-EVALCZ FPGA-based data capture kit

This section provides quick start procedures for using the AD8283CP-EBZ, or AD8285CP-EBZ board.

Set the jumper settings/link options on the evaluation board for the required operating modes before powering on the board. The functions of the jumpers are described in Table 1. Figure 1 shows the default jumper settings.

Before using the software for testing, configure the evaluation board as follows:

1. Connect the evaluation board to the data capture board, as shown in Figure 2.

2. Connect one 6V, 2A switching power supply to the evaluation board, and another 6V, 2A switching power supply to the data capture board. Power up both boards.
3. Connect the data capture board to the PC using a USB cable. Make sure that all the jumpers on J601 are connected.
4. Open VisualAnalog on the connected PC. The board should automatically be detected. Configure the board as instructed in AN-905. Select the preferred template to begin.

Click Yes when the dialog box below appears to configure the part.

5. After properly configuring the VisualAnalog software, open SPI controller. Configure the software as in AN-878 by loading the appropriate Cfg and Cal files. Click the Read button on the CHIP ID(1) box to check whether the correct configuration files have been loaded.

Configure the part registers on the ADCBase0 tab. Individual registers may also be written or read to on the Eng 0 tab.

6. When the registers have been properly configured, click Update on VisualAnalog to run the canvas.

The AD8283 and AD8285 require 3.3V and 1.8V supplies for both analog (AVDD) and digital (DVDD) power. The evaluation boards have on-board regulators, specifically the ADP3339, to supply this power. U705 and U706 provide the 3.3V digital and analog supply, respectively. U707 and U704, on the other hand, provide the 1.8V digital and analog supply.

Each input is configured with SMA ports and terminated with 50ohms for easy interfacing to source equipment. Each input is connected with a diode array for overcurrent protection. The inputs are AC-coupled to the AD8283/5. Use P10x to connect any of the positive input pins to ground. Use P11x to short any of the negative inputs to ground. Use P12x to short any two differential lines together.

The AD8283CP-EBZ and AD8285CP-EBZ use the Analog Devices high speed converter evaluation platform (HSC-ADC-EVALCZ) for capturing data. The digital outputs D0 to D11 are directly mapped to connector P702. For more information on the data capture board and its settings, visit www.analog.com/hsadcevalboard.

The AD8283CP-EBZ and AD8285CP-EBZ have default 72MHz oscillators on-board. This clock signal is coupled via a transformer to the CLK+ and CLK- pins of the AD8283/5. This oscillator can be controlled using J403. Placing the jumper at position 1 disables the oscillator, while placing it in position 2 enables the oscillator.

The clock may also be driven externally through the SMA connectors J401 and J402. J403 should be placed in position 2 to disable the onboard oscillator.

It is recommended that then AD8283/5 be driven with a clock source that has low jitter and low phase noise. The board is configured with the AD9515 clock distribution IC, which may be used to improve the jitter and phase noise performance of the clock. To use the AD9515, connect 0ohm resistors to R406 and R407 and remove resistors R415 and R416. Capacitors with a value of 0.1uF should also be connected to C405 and C406. The part is hardware programmable through resistors R424 to R445. The AD9515 LVPECL output is mapped directly to the CLK+ and CLK- pins of the AD8283/5.

The AD8283/5 may be configured to derive its reference voltage internally or externally. The board comes installed with the ADR130, which is configured to provide a 1V reference. A 0ohm resistor must be connected at R311 in order to use this reference. Make sure internal register 0x18 is configured appropriately before applying the external reference.

Rbias has a default 10kohm resistor installed to ground and is used to set the ADC core bias current. Note that using a resistor with a value other than 10kohm, 1% may degrade the performance of the device.

In order to obtain an FFT plot, follow steps 1 to 5 on the Getting Started section, choosing the FFT canvas on the VisualAnalog window. The part and the data capture board must then be configured for proper operation, as detailed in the sections below.

Configure Register 0x0C on the SPI controller, depending on the number of channels to be enabled. The correct register settings can be found in the Register Map section of the AD8283/5 datasheet.

To do this, on the Eng0 tab of the SPI controller, enter the address in the appropriate field, then enter the data to be written to the register. These values can be written in binary, hex, or decimal notations. In the figure below, writing 1010b or 0x0A to the register indicates that all channels are active.

Click Write.

The sample rate of the data capture board must be configured to run at the effective sample rate of the part for proper operation. Note that the effective sample rate is given by

To do this, on the VisualAnalog canvas, click on the Settings button of the ADC Data Capture Block.

Enter the effective sample rate in the Clock Frequency option. The figure below shows the settings for the AD8283 with all 6 channels active.

To add channels from the data capture board, choose the desired channel by selecting it from the drop-down list as shown in the Figure below.

After selecting the data, click Add. It should now show up on the Output Data Box.

To remove a channel, click the channel, and click Remove.

Once all registers and settings have been configured, the FFT can now be run.
1. Connect a signal source to the SMA inputs of the evaluation board.
2. Click update on the VisualAnalog window.