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The TPS382x family of supervisors provides circuit initialization and timing supervision, primarily for DSP and processor-based systems.
During power-on, RESET\ is asserted when supply voltage VDD becomes higher than 1.1 V. Thereafter, the supply voltage supervisor monitors VDD and keeps RESET\ active as long as VDD remains below the threshold voltage VIT–. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td, starts after VDD has risen above the threshold voltage VIT–. When the supply voltage drops below the threshold voltage VIT–, the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage VIT– set by an internal voltage divider.
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